1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
|
typedef enum
{
UART_REG_DLL = 0, /* 00 Divisor Latch Low */
UART_REG_DLH, /* 01 Divisor Latch High */
UART_REG_RXD = 0, /* 00 Receive Data */
UART_REG_TXD = 0, /* 00 Transmit Data */
UART_REG_IER, /* 01 Interrupt Enable */
UART_REG_IIR, /* 02 Interrupt Indicator */
UART_REG_LCR, /* 03 Line Control */
UART_REG_MCR, /* 04 Modem Control */
UART_REG_LSR, /* 05 Line Status */
UART_REG_MSR, /* 06 Modem Status */
UART_REG_SCR, /* 07 SCratch */
UART_REG_NB
}
tUART_REG;
/* Macros de reduction (plus facile a utiliser) */
#define DLL UART_REG_DLL
#define DLH UART_REG_DLH
#define RXD UART_REG_RXD
#define TXD UART_REG_TXD
#define IER UART_REG_IER
#define IIR UART_REG_IIR
#define LCR UART_REG_LCR
#define MCR UART_REG_MCR
#define LSR UART_REG_LSR
#define MSR UART_REG_MSR
#define SCR UART_REG_SCR
#define REG_MAX ((uint) (UART_REG_NB - 1))
#define REG_PAS 1
#define LCR_WL_MSK ((uint)(bit1|bit0))
#define LCR_WL_DEC 0
#define LCR_STB bit2
#define LCR_PEN bit3
#define LCR_EPS bit4
#define LCR_DLAB bit7
#define MCR_DTR bit0 /* 108 */
#define MCR_RTS bit1 /* 105 */
#define MCR_OUT1 bit2
#define MCR_OUT2 bit3
#define MSR_CTS bit4
#define MSR_DSR bit5
#define MSR_RI bit6
#define MSR_DCD bit7
#define IIR_IP ((uint) bit0)
#define IIR_AI ((uint) (bit1|bit2))
#define LSR_RXDA bit0
#define LSR_OE bit1
#define LSR_PE bit2
#define LSR_FE bit3
#define LSR_BD bit4
#define LSR_TXDE bit5
#define LSR_TXMS bit6 |
