Bonjour à tous et toutes !
J'aimerais manipuler mes données à l'octet près, en passant par la cache L2, sans faire confiance à un compilateur, mais en forçant l'usage.
Est-ce possible (je dirais oui) ?
Si oui, comment :wink: ?
Merci d'avance !
Version imprimable
Bonjour à tous et toutes !
J'aimerais manipuler mes données à l'octet près, en passant par la cache L2, sans faire confiance à un compilateur, mais en forçant l'usage.
Est-ce possible (je dirais oui) ?
Si oui, comment :wink: ?
Merci d'avance !
Avec l'instruction PREFETCH, on peut contrôler le cache L2.
PREFETCH
Usage: PREFETCH src Modifies flags: None
Loads a processor cache line into the data cache. The address of this line is specified by the mem8 value.
Prefetch Data Into Caches
PREFETCH mem8 ; 0F 0D /0 [PENT,3DNOW]
PREFETCHW mem8 ; 0F 0D /1 [PENT,3DNOW]
PREFETCH and PREFETCHW fetch the line of data from memory that contains the specified byte. PREFETCHW performs differently on the Athlon to earlier processors.
For the AMD processor, the line size is 32 bytes. In all future processors, the size of the line that is loaded by the PREFETCH instruction will be at least 32-bytes. If a cache hit occurs (the line is already in the Dcache) or a memory fault is detected, no bus cycle is initiated and the instruction is treated as a NOP. For more details, see the 3DNow! Technology Manual.
PREFETCHh
Usage: PREFETCHh src Modifies flags: None
Fetches the line of data from memory that contains the byte specified with the 'src' operand to a location in the cache hierarchy specified by a locality hint.
Prefetch Data Into Caches
PREFETCHNTA PREFETCHT0 PREFETCHT1 PREFETCHT2
PREFETCHNTA m8 ; 0F 18 /0 [KATMAI]
PREFETCHT0 m8 ; 0F 18 /1 [KATMAI]
PREFETCHT1 m8 ; 0F 18 /2 [KATMAI]
PREFETCHT2 m8 ; 0F 18 /3 [KATMAI]
The PREFETCHh instructions fetch the line of data from memory that contains the specified byte. It is placed in the cache according to rules specified by locality hints :
The hints are:
(temporal data) - prefetch data into all levels of the cache hierarchy.
T1 (temporal data with respect to first level cache) - prefetch data into level 2 cache and higher.
T2 (temporal data with respect to second level cache) - prefetch data into level 2 cache and higher.
NTA (non-temporal data with respect to all cache levels) - prefetch data into non-temporal cache structure and into a location close to the processor, minimizing cache pollution.
This instruction is merely a hint and does not affect program behavior. If executed, this instruction moves data closer to the processor in anticipation of future use. The implementation of prefetch locality hints is implementation - dependent, and can be over-loaded or ignored by a processor implementation. The amount of data prefetched is also processor implementation-dependent. It will, however, be a minimum of 32 bytes.
Note that this group of instructions doesn't provide a guarantee that the data will be in the cache when it is needed. For more details, see the Intel IA32 Software Developer Manual, Volume 2.
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