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| /*
* pci.c - Fonctions relatives à la gestion du bus PCI.
*
* Obsidian, le ven. 12 oct. 2012 01:15:17 CEST
*/
#include "pci.h"
#include "stdlib.h"
__attribute ((noinline)) PCIInfos PCIEnumerate (uint8_t bus,uint8_t device,uint8_t function)
{
PCIInfos infos;
uint32_t address;
uint32_t resultat;
device &= 0x1f;
function &= 0x07;
/* Note: les bits 0 et 1 de l'offset sont toujours nuls,
* nous obligeant à spécifier une adresse alignée sur
* un multiple de 32 bits. */
/* Le bit 31 est le « Enable bit » pour les « configuration
* cycles », nécessaire pour pouvoir lire l'espace du périphérique
* à travers le port I/O et le configurer, comme un Chip Select.
* (à relire). */
/* address = 0x80000000
| ((uint32_t)bus << 16)
| ((uint32_t)device << 11)
| ((uint32_t)function << 8)
| 0; */ /* Offset */
address = PCIBDFToAddress (bus,device,function,0);
resultat = PCIPeek (address);
infos.device_id = resultat >> 16;
infos.vendor_id = resultat & 0xffff;
if (infos.device_id != 0xffff || infos.vendor_id != 0xffff)
{
address += 4;
resultat = PCIPeek(address);
infos.status = resultat >> 16;
infos.command = resultat & 0xffff;
address += 4;
resultat = PCIPeek(address);
infos.class_code = resultat >> 8;
infos.revision_id = resultat & 0xff;
}
address &= 0x7fffff00;
__asm ( "out %%eax,%%dx\n"
:
: "a" (address), "d" (PCI_CONFIG_ADDRESS)
: );
return infos;
}
uint32_t PCIPeek(uint32_t address)
{
uint32_t resultat;
__asm ( "out %%eax,%%dx;\n"
:
: "a" (address), "d" (PCI_CONFIG_ADDRESS)
: );
__asm ( "in %%dx,%%eax\n"
: "=a" (resultat)
: "d" (PCI_CONFIG_DATA)
: );
return resultat;
}
int PCIPoke (uint32_t address,uint32_t value)
{
__asm ( "out %%eax,%%dx;\n"
:
: "a" (address), "d" (PCI_CONFIG_ADDRESS)
: );
__asm ( "out %%eax,%%dx;\n"
:
: "a" (value), "d" (PCI_CONFIG_DATA)
: );
return 0;
}
uint32_t PCIDevicePeek (uint8_t bus,uint8_t device,uint8_t function,uint8_t offset)
{
return PCIPeek (PCIBDFToAddress(bus,device,function,offset));
}
uint32_t PCIDevicePoke (uint8_t bus,uint8_t device,uint8_t function,uint8_t offset,uint32_t value)
{
return PCIPoke (PCIBDFToAddress(bus,device,function,offset),value);
}
uint32_t PCIBDFToAddress (uint8_t bus,uint8_t device,uint8_t function,uint8_t offset)
{
return (uint32_t)0x80000000
| ((uint32_t)bus << 16)
| ((uint32_t)device << 11)
| ((uint32_t)function << 8)
| (uint32_t)offset;
}
void EnumPCIDevices (void)
{
int x,y;
printf ("PCI bus device enumeration:\n");
for (x=0;x<256;++x) /* Bus */
for (y=0;y<32 ;++y) /* Device */
{
PCIInfos infos;
infos = PCIEnumerate (x,y,0);
if (infos.device_id != 0xffff || infos.vendor_id != 0xffff)
printf ("Bus %3d, Device %2d: %04x:%04x (class: 0x%02x, subclass 0x%04x, rev %3d)\n",
x,y,
infos.vendor_id, infos.device_id,
infos.class_code >> 16,
infos.class_code & 0xffff,
infos.revision_id);
}
printf ("PCI enumeration done.\n\n");
}
void MapEthernetInterface (void)
{
/* Spécifications Ethernet du Chipset Intel 82801CAM ICH3 */
/* 29071601.pdf Section 7-6 */
printf ("Mapping ethernet interface (\"2:8:0 8086:1031\") into memory.\n");
PCIDevicePoke (2,8,0,0x10,0x00400000); /* b32-12. Mem position */
PCIDevicePoke (2,8,0,0x14,0x00004000); /* b15-06. I/O position */
printf ("Device now supposed to be mapped at 0x%08x.\n",0x400000);
}
void MapUSBInterface (void)
{
/* Spécifications Ethernet du Chipset Intel 82801CAM ICH3 */
/* 29071601.pdf Section 5-16 */
printf ("Mapping USB interface (\"0:29:0 8086:2482\") into memory.\n");
PCIDevicePoke (0,29,0,0x10,0x00500000); /* b32-12. Mem position */
PCIDevicePoke (0,29,0,0x14,0x00005000); /* b15-06. I/O position */
printf ("Device now supposed to be mapped at 0x%08x.\n",0x500000);
} |
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